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DHWCtrl.EthActivate

Initialize MAC + PHY for PeripheralIndex: apply the pin routing described by PinMap, program the source MacAddress, enable RX/TX. Returns once init completes; PHY autonegotiation runs asynchronously - call EthWaitLinkState to block until the link is up.

Properties

Parameters (request frame)

Name Type/Size Description
Length of PinMap Integer (8 bits) Number of elements in the PinMap array
PinMap Array Logical-to-physical pin assignments for this port. Must contain exactly the functions this instance requires (RMII data/control plus MDIO management); unknown, surplus, or duplicate names are rejected with ErrInvalidParam.
Entry.Name Enumeration (8 bits) Logical peripheral function this pin carries.
Logical pin-function identifier, prefixed by electrical bus/signal family (not by DHWCtrl peripheral category). A signal shared by 2 roles on the same bus reuses a single keyword - e.g. UsbDp / UsbDm serve both a USB host and a (future) USB device role. It is used as the logical side of a DHWCtrlPinMapEntry; a given Activate accepts only the names of the one or more buses its category uses.
Values (24):
  • SpiSck (0x00)
    SPI clock.
  • SpiMosi (0x01)
    SPI master-out/slave-in.
  • SpiMiso (0x02)
    SPI master-in/slave-out.
  • EthTxd0 (0x10)
    RMII transmit data bit 0.
  • EthTxd1 (0x11)
    RMII transmit data bit 1.
  • EthTxEn (0x12)
    RMII transmit enable.
  • EthRxd0 (0x13)
    RMII receive data bit 0.
  • EthRxd1 (0x14)
    RMII receive data bit 1.
  • EthCrsDv (0x15)
    RMII carrier-sense/receive-data-valid.
  • EthRefClk (0x16)
    RMII 50 MHz reference clock.
  • EthMdc (0x17)
    MDIO management clock.
  • EthMdio (0x18)
    MDIO management data.
  • SdmmcClk (0x30)
    SDMMC clock.
  • SdmmcCmd (0x31)
    SDMMC command line.
  • SdmmcDat0 (0x32)
    SDMMC data bit 0.
  • SdmmcDat1 (0x33)
    SDMMC data bit 1.
  • SdmmcDat2 (0x34)
    SDMMC data bit 2.
  • SdmmcDat3 (0x35)
    SDMMC data bit 3.
  • SdmmcDat4 (0x36)
    SDMMC data bit 4.
  • SdmmcDat5 (0x37)
    SDMMC data bit 5.
  • SdmmcDat6 (0x38)
    SDMMC data bit 6.
  • SdmmcDat7 (0x39)
    SDMMC data bit 7.
  • UsbDp (0x40)
    USB D+ data line.
  • UsbDm (0x41)
    USB D- data line.
Entry.Pin.Port Enumeration (8 bits) GPIO bank letter (A..Z).
SoC-native GPIO bank identifier. The keyword letters mirror the bank designators on STM32-style parts; not every part implements the full A..Z range. The firmware rejects banks it doesn't support with ErrInvalidParam.
Values (26):
  • A (0x00)
  • B (0x01)
  • C (0x02)
  • D (0x03)
  • E (0x04)
  • F (0x05)
  • G (0x06)
  • H (0x07)
  • I (0x08)
  • J (0x09)
  • K (0x0A)
  • L (0x0B)
  • M (0x0C)
  • N (0x0D)
  • O (0x0E)
  • P (0x0F)
  • Q (0x10)
  • R (0x11)
  • S (0x12)
  • T (0x13)
  • U (0x14)
  • V (0x15)
  • W (0x16)
  • X (0x17)
  • Y (0x18)
  • Z (0x19)
Entry.Pin.Number Integer (8 bits) Pin number within the bank. Practical range is SoC-specific (typically 0..15 on STM32). Named Number rather than Index to avoid a NameChecker collision with the peripheral-instance Index in ListPeripherals's Pins array (struct parents don't currently participate in field-name namespacing).
PeripheralIndex Integer (8 bits) Zero-based instance index within this peripheral category; defaults to 0 (the first instance). The valid range is firmware/hardware-variant specific; discoverable via ListPeripherals.
MacAddress Raw data (length 6 Bytes) Source MAC address (6 bytes) to program into the MAC engine.

Returned values (response frame)

None