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DHWCtrl.GpioConfigure

Set direction / drive of a single GPIO pin. For outputs, the level is driven immediately to avoid glitches. OpenDrain starts Hi-Z; drive low via GpioSetState(Low) and release via GpioSetState(High).

Properties

Parameters (request frame)

Name Type/Size Description
Pin.Port Enumeration (8 bits) GPIO bank letter (A..Z).
SoC-native GPIO bank identifier. The keyword letters mirror the bank designators on STM32-style parts; not every part implements the full A..Z range. The firmware rejects banks it doesn't support with ErrInvalidParam.
Values (26):
  • A (0x00)
  • B (0x01)
  • C (0x02)
  • D (0x03)
  • E (0x04)
  • F (0x05)
  • G (0x06)
  • H (0x07)
  • I (0x08)
  • J (0x09)
  • K (0x0A)
  • L (0x0B)
  • M (0x0C)
  • N (0x0D)
  • O (0x0E)
  • P (0x0F)
  • Q (0x10)
  • R (0x11)
  • S (0x12)
  • T (0x13)
  • U (0x14)
  • V (0x15)
  • W (0x16)
  • X (0x17)
  • Y (0x18)
  • Z (0x19)
Pin.Number Integer (8 bits) Pin number within the bank. Practical range is SoC-specific (typically 0..15 on STM32). Named Number rather than Index to avoid a NameChecker collision with the peripheral-instance Index in ListPeripherals's Pins array (struct parents don't currently participate in field-name namespacing).
Mode Enumeration (8 bits) Direction and drive configuration for the pin.
Values (7):
  • OutputLow (0x00)
    Push-pull output driven low.
  • OutputHigh (0x01)
    Push-pull output driven high.
  • InputFloating (0x02)
    High-impedance input (no pull resistor).
  • InputPullUp (0x03)
    Input with internal pull-up.
  • InputPullDown (0x04)
    Input with internal pull-down.
  • OpenDrain (0x05)
    Open-drain output for wired-OR buses (I2C-style scan). Initial level Hi-Z; drive low via GpioSetState(Low) and release via GpioSetState(High).
  • Disabled (0xFF)
    Pin released back to the SoC default.

Returned values (response frame)

None